可訂購部件
型號(hào) | 可訂購的器件編號(hào) | 訂購代碼(12NC) | 封裝 | 從經(jīng)銷商處購買 |
---|---|---|---|---|
74ALVC74PW-Q100 | 74ALVC74PW-Q100J | 935691576118 | SOT402-1 | 訂單產(chǎn)品 |
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Click here for more informationDual D-type flip-flop with set and reset; positive-edge trigger
The 74ALVC74-Q100 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.
Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Wide supply voltage range from 1.65 V to 3.6 V
CMOS low power dissipation
Overvoltage tolerant inputs to 3.6 V
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 250 mA per JESD78 Class II.A
Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
---|---|---|---|---|---|---|---|---|
74ALVC74PW-Q100 | 1.65?-?3.6 | TTL | ± 24 | 2.3 | 425 | low | -40~85 | TSSOP14 |
型號(hào) | 可訂購的器件編號(hào),(訂購碼(12NC)) | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74ALVC74PW-Q100 | 74ALVC74PW-Q100J (935691576118) |
Active | ALVC74 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
型號(hào) | 可訂購的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74ALVC74PW-Q100 | 74ALVC74PW-Q100J | 74ALVC74PW-Q100 |
文件名稱 | 標(biāo)題 | 類型 | 日期 |
---|---|---|---|
74ALVC74_Q100 | Dual D-type flip-flop with set and reset; positive-edge trigger | Data sheet | 2024-02-05 |
SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
SOT402-1_118 | TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
74ALVC74PW-Q100_Nexperia_Product_Reliability | 74ALVC74PW-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫 應(yīng)答表 我們會(huì)盡快回復(fù)您。
文件名稱 | 標(biāo)題 | 類型 | 日期 |
---|---|---|---|
SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
---|---|---|---|---|---|---|
74ALVC74PW-Q100 | 74ALVC74PW-Q100J | 935691576118 | Active | SOT402-1_118 | 2,500 | 訂單產(chǎn)品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.