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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LV14DB

Hex inverting Schmitt trigger

The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC14 and 74HCT14.

The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Wide supply voltage range from 1.0 V to 5.5 V

  • CMOS low power dissipation

  • Optimized for low voltage applications: 1.0 V to 3.6 V

  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

  • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.5 V to 5.5 V)
  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Applications

  • Wave and pulse shapers for highly noisy environments

  • Astable multivibrators

  • Monostable multivibrators

參數(shù)類型

型號(hào) Package name
74LV14DB SSOP14

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LV14DB 74LV14DB,118
(935170180118)
Discontinued / End-of-life LV14 SOT337-1
SSOP14
(SOT337-1)
SOT337-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
SOT337-1_118
74LV14DB,112
(935170180112)
Obsolete LV14 暫無(wú)信息

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74LV14DB 74LV14DB,118 74LV14DB rohs rhf rhf
74LV14DB 74LV14DB,112 74LV14DB rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (8)

文件名稱 標(biāo)題 類型 日期
74LV14 Hex inverting Schmitt trigger Data sheet 2024-01-23
lv14 74LV14 IBIS model IBIS model 2019-01-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SSOP14_SOT337-1_mk plastic, shrink small outline package; 14 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body Marcom graphics 2017-01-28
SOT337-1 plastic, shrink small outline package; 14 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body Package information 2020-04-21
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
lv lv Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
lv14 74LV14 IBIS model IBIS model 2019-01-09
lv lv Spice model SPICE model 2013-05-07

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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