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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調(diào)節(jié)ESD保護

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認證產(chǎn)品(AEC-Q100/Q101)

74LVC1G08GV

Single 2-input AND gate

The 74LVC1G08 is a single 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • Overvoltage tolerant inputs to 5.5 V

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance ≤ 250 mA

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from ?40 °C to +85 °C and ?40 °C to +125 °C

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74LVC1G08GV 1.65?-?5.5 CMOS/LVTTL ± 24 2.1 150 1 low -40~125 TSOP5

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標示 封裝 外形圖 回流焊/波峰焊 包裝
74LVC1G08GV 74LVC1G08GV,125
(935272011125)
Active V08 SOT753
TSOP5
(SOT753)
SOT753 REFLOW_BG-BD-1
WAVE_BG-BD-1
SOT753_125

環(huán)境信息

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74LVC1G08GV 74LVC1G08GV,125 74LVC1G08GV rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (13)

文件名稱 標題 類型 日期
74LVC1G08 Single 2-input AND gate Data sheet 2024-09-03
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11009 Pin FMEA for LVC family Application note 2019-01-09
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
SOT753 3D model for products with SOT753 package Design support 2019-01-22
lvc1g08 74LVC1G08 IBIS model IBIS model 2014-10-20
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT753 plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body Package information 2022-05-31
SOT753_125 TSOP5; Reel pack for SMD, 7"; Q3/T4 product orientation Packing information 2020-04-21
74LVC1G08GV_Nexperia_Product_Reliability 74LVC1G08GV Nexperia Product Reliability Quality document 2024-06-16
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
MAR_SOT753 MAR_SOT753 Topmark Top marking 2013-06-03
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08

支持

如果您需要設(shè)計/技術(shù)支持,請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。

模型

文件名稱 標題 類型 日期
lvc1g08 74LVC1G08 IBIS model IBIS model 2014-10-20
SOT753 3D model for products with SOT753 package Design support 2019-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74LVC1G08GV 74LVC1G08GV,125 935272011125 Active SOT753_125 3,000 訂單產(chǎn)品

樣品

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如果您沒有 Nexperia 的直接賬戶,我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74LVC1G08GV 74LVC1G08GV,125 935272011125 SOT753 訂單產(chǎn)品
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