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Click here for more information74LVC3G07GM
Triple buffer with open-drain output
The 74LVC3G07 provides three non-inverting buffers.
The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Alternatives
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V).
-24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
參數(shù)類型
| 型號(hào) | Package name |
|---|---|
| 74LVC3G07GM | XQFN8 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封裝
下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC3G07GM | 74LVC3G07GM,115 (935277246115) |
Obsolete | V07 |
XQFN8 (SOT902-2) |
SOT902-2 | 暫無(wú)信息 | |
| 74LVC3G07GM,125 (935277246125) |
Obsolete | V07 | SOT902-2_125 |
環(huán)境信息
下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC3G07GM | 74LVC3G07GM,115 | 74LVC3G07GM |
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| 74LVC3G07GM | 74LVC3G07GM,125 | 74LVC3G07GM |
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Series
文檔 (8)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC3G07 | Triple buffer with open-drain output | Data sheet | 2023-08-24 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| lvc3g07 | 74LVC3G07 IBIS model | IBIS model | 2015-01-15 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| XQFN8_SOT902-2_mk | plastic, extremely thin quad flat package; 8 terminals; 0.55 mm pitch; 1.6 mm x 1.6 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| SOT902-2 | plastic, leadless extremely thin quad flat package; 8 terminals; 0.5 mm pitch; 1.6 mm x 1.6 mm x 0.5 mm body | Package information | 2020-04-21 |
支持
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模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| lvc3g07 | 74LVC3G07 IBIS model | IBIS model | 2015-01-15 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LVC3G07GM
Triple buffer with open-drain output
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