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Click here for more informationIP4059CX5
Integrated USB 2.0 and USB OTG ESD protection to IEC 61000-4-2 level 4
The IP4059CX5 is designed to protect several I/O pins of computer interfaces, such as Universal Serial Bus (USB) 2.0, USB On-The-Go (OTG), Ethernet, Digital Visual Interface (DVI) etc. The IP4059CX5 incorporates ultra-low capacity diodes to provide protection to downstream components from ElectroStatic Discharge (ESD) voltages as high as ±8 kV contact discharge according to the IEC 61000-4-2 model.
The device is fabricated using monolithic silicon technology and integrates four ultra-low capacity ESD protection diodes in a 0.5 mm pitch Wafer-Level Chip-Scale Package (WLCSP) measuring 0.96 mm by 1.34 mm only.
Features and benefits
- Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
- 4 ultra-low input capacity rail-to-rail ESD protection diodes with Cd = 3.0 pF
- Integrated ESD protection withstanding ±8 kV contact discharge and ±15 kV air discharge
- WLCSP with 0.5 mm pitch
Applications
General purpose ElectroMagnetic Interference (EMI) and Radio Frequency Interference (RFI) filtering and downstream ESD protection for USB ports inside:
- Cellular and Personal Communication System (PCS) mobile handsets
- PC peripherals and PCs
- Cordless telephones
- Wireless data and Local Area Network (LAN) systems
- Personal Digital Assistants (PDAs)
- Digital cameras
封裝
下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。
型號(hào) | 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
IP4059CX5 | IP4059CX5/LF,115 (934058212115) |
Obsolete | no package information | ||||
IP4059CX5/LF,135 (934058212135) |
Obsolete | ||||||
IP4059CX5,115 (934058222115) |
Obsolete | ||||||
IP4059CX5,135 (934058222135) |
Obsolete | ||||||
IP4059CX5/LF/C,115 (934058492115) |
Obsolete | ||||||
IP4059CX5/LF/C,135 (934058492135) |
Obsolete |
環(huán)境信息
下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。
文檔 (3)
文件名稱 | 標(biāo)題 | 類型 | 日期 |
---|---|---|---|
AN10910 | Protecting charger interfaces and typical battery charging topologies with external bypass transistors | Application note | 2021-04-12 |
nexperia_document_leaflet_WLCSP_201803_CHN | WLCSP Chinese Translation | Leaflet | 2018-04-25 |
R_10001 | Guideline for the laser marking layout of WLCSP devices | Report | 2021-01-05 |
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模型
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.