可訂購部件
型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經銷商處購買 |
---|---|---|---|---|
74AXP2T45GX | 74AXP2T45GXX | 935690876115 | SOT1233-2 | 訂單產品 |
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Click here for more information2-bit dual supply translating transceiver; 3-state
The 74AXP2T45 is a 2-bit, dual supply transceiver with 3-state outputs that enables bidirectional level translation. It features two 2-bit input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/μs and 5.5 V/s. Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.
Wide supply voltage range:
VCC(A): 0.9 V to 5.5 V
VCC(B): 0.9 V to 5.5 V
Low input capacitance; CI = 1.4 pF (typical)
Low output capacitance; CO = 4.4 pF (typical)
Low dynamic power consumption; CPD = 11 pF (typical)
Low static power consumption; ICC = 2 μA (25 °C maximum)
High noise immunity
Complies with JEDEC standard:
JESD8-12 (1.1 V to 1.3 V; inputs)
JESD8-11 (1.4 V to 1.6 V)
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD12-6 (4.5 V to 5.5 V)
Latch-up performance exceeds 100 mA per JESD78D Class II
Inputs accept voltages up to 5.5 V
Low noise overshoot and undershoot < 10% of VCCO
IOFF circuitry provides partial power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +125 °C
型號 | VCC(A) (V) | VCC(B) (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name | Category |
---|---|---|---|---|---|---|---|---|---|---|
74AXP2T45GX | 0.9?-?5.5 | 0.9?-?5.5 | CMOS | ± 12 | 9 | 2 | ultra low | -40~125 | X2SON8 | Bi-directional | Direction controlled |
型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74AXP2T45GX | 74AXP2T45GXX (935690876115) |
Active | R5 |
X2SON8 (SOT1233-2) |
SOT1233-2 | SOT1233-2_115 |
文件名稱 | 標題 | 類型 | 日期 |
---|---|---|---|
74AXP2T45 | 2-bit dual supply translating transceiver; 3-state | Data sheet | 2024-07-25 |
AN90029 | Pin FMEA for AXPnT family | Application note | 2021-07-13 |
SOT1233-2 | 3D model for products with SOT1233-2 package | Design support | 2021-01-28 |
SOT1233-2 | plastic thermal enhanced extremely thin small outline package; no leads;8 terminals; body 1.35 x 0.8 x 0.32 mm | Package information | 2022-04-21 |
SOT1233-2_115 | X2SON8; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-05-12 |
74AXP2T45GX_Nexperia_Product_Reliability | 74AXP2T45GX Nexperia Product Reliability | Quality document | 2024-06-16 |
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文件名稱 | 標題 | 類型 | 日期 |
---|---|---|---|
SOT1233-2 | 3D model for products with SOT1233-2 package | Design support | 2021-01-28 |
型號 | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
---|---|---|---|---|---|---|
74AXP2T45GX | 74AXP2T45GXX | 935690876115 | Active | SOT1233-2_115 | 10,000 | 訂單產品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.