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Click here for more information74AUP1T34GF
Low-power dual supply translating buffer
The 74AUP1T34 is a single dual supply translating buffer. Input A is referenced to VCC(A) and output Y is referenced to VCC(Y). Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 1.1 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Alternatives
Features and benefits
Wide supply voltage range from 1.1 V to 3.6 V
CMOS low power dissipation
High noise immunity
Complies with JEDEC standards:
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
Wide supply voltage range:
VCC(A): 1.1 V to 3.6 V
VCC(Y): 1.1 V to 3.6 V
Low static power consumption; ICC = 0.9 μA (maximum)
Each port operates over the full 1.1 V to 3.6 V power supply range
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
型號 | Package name |
---|---|
74AUP1T34GF | XSON6 |
PCB Symbol, Footprint and 3D Model
Model Name | 描述 |
---|---|
|
封裝
下表中的所有產品型號均已停產 。
型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74AUP1T34GF | 74AUP1T34GF,132 (935281321132) |
Obsolete | pQ |
XSON6 (SOT891) |
SOT891 |
REFLOW_BG-BD-1
|
SOT891_132 |
Series
文檔 (12)
文件名稱 | 標題 | 類型 | 日期 |
---|---|---|---|
74AUP1T34 | Low-power dual supply translating buffer | Data sheet | 2024-09-23 |
AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
Nexperia_document_guide_Logic_translators | Nexperia Logic Translators | Brochure | 2021-04-12 |
Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
SOT891 | 3D model for products with SOT891 package | Design support | 2019-10-03 |
aup1t34 | 74AUP1T34 IBIS model | IBIS model | 2014-12-14 |
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
DFN1010-6_SOT891_mk | plastic, extremely thin small outline package; 6 terminals; 0.55 mm pitch; 1 mm x 1 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
SOT891 | plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1 mm x 0.5 mm body | Package information | 2020-04-21 |
REFLOW_BG-BD-1 | Reflow soldering profile | Reflow soldering | 2021-04-06 |
MAR_SOT891 | MAR_SOT891 Topmark | Top marking | 2013-06-03 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.