74ALVCH16373DGG

2.5 V/3.3 V 16-bit D-type transparent latch; 3-state

The 74ALVCH16373 is a 16-bit D-type transparent latch with bus hold inputs and 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches.

This device is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
MULTIBYTE? flow-through standard pin-out architecture
Low inductance multiple V_CC and GND pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold
Latch-up performance exceeds 100 mA per JESD78 Class II.A
Output drive capability 50 ? transmission lines at 85 °C
Current drive ±24 mA at V_CC = 3.0 V
Complies with JEDEC standards:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C/JESD36 (2.7 V to 3.6 V)
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C

參數(shù)類型

型號	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	Power dissipation considerations	T_amb (°C)	Package name
74ALVCH16373DGG	2.3?-?3.6	LVTTL	± 24	2.1	low	-40~85	TSSOP48

PCB Symbol, Footprint and 3D Model

Model Name	描述

封裝

型號	可訂購的器件編號，（訂購碼(12NC)）	狀態(tài)	標示	封裝	外形圖	回流焊/波峰焊	包裝
74ALVCH16373DGG	74ALVCH16373DGG:11 (935205120118)	Active	ALVCH16373	TSSOP48 (SOT362-1)	SOT362-1	SSOP-TSSOP-VSO-WAVE	SOT362-1_118

環(huán)境信息

型號	可訂購的器件編號	化學成分	RoHS	RHF指示符
74ALVCH16373DGG	74ALVCH16373DGG:11	74ALVCH16373DGG

品質(zhì)及可靠性免責聲明

Series

文檔 (9)

文件名稱	標題	類型	日期
74ALVCH16373	2.5 V/3.3 V 16-bit D-type transparent latch; 3-state	Data sheet	2024-06-18
SOT362-1	3D model for products with SOT362-1 package	Design support	2020-01-22
alvch16373	alvch16373 IBIS model	IBIS model	2013-04-08
Nexperia_package_poster	Nexperia package poster	Leaflet	2020-05-15
TSSOP48_SOT362-1_mk	plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body	Marcom graphics	2017-01-28
SOT362-1	plastic thin shrink small outline package; 48 leads; body width 6.1 mm	Package information	2024-01-05
SOT362-1_118	TSSOP48; Reel pack for SMD, 13''; Q1/T1 product orientation	Packing information	2020-04-21
74ALVCH16373DGG_Nexperia_Product_Reliability	74ALVCH16373DGG Nexperia Product Reliability	Quality document	2024-06-16
SSOP-TSSOP-VSO-WAVE	Footprint for wave soldering	Wave soldering	2009-10-08

支持

如果您需要設計/技術(shù)支持，請告知我們并填寫應答表我們會盡快回復您。

模型

文件名稱	標題	類型	日期
alvch16373	alvch16373 IBIS model	IBIS model	2013-04-08
SOT362-1	3D model for products with SOT362-1 package	Design support	2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name	描述

訂購、定價與供貨

型號	Orderable part number	Ordering code (12NC)	狀態(tài)	包裝	Packing Quantity	在線購買
74ALVCH16373DGG	74ALVCH16373DGG:11	935205120118	Active	SOT362-1_118	2,000	訂單產(chǎn)品

樣品

作為 Nexperia 的客戶，您可以通過我們的銷售機構(gòu)訂購樣品。

如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式數(shù)據(jù)手冊