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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74AUP2G57GF

Low-power dual PCB configurable multiple function gate

The 74AUP2G57 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V

  • High noise immunity

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • Low noise overshoot and undershoot < 10% of VCC

  • IOFF circuitry provides partial power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

參數(shù)類型

型號 Package name
74AUP2G57GF XSON10

封裝

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74AUP2G57GF 74AUP2G57GFX
(935304472115)
Withdrawn / End-of-life aC SOT1081-2
XSON10
(SOT1081-2)
SOT1081-2 暫無信息

環(huán)境信息

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74AUP2G57GF 74AUP2G57GFX 74AUP2G57GF rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (6)

文件名稱 標(biāo)題 類型 日期
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
aup2g57 74AUP2G57 IBIS model IBIS model 2015-04-02
Nexperia_document_QIC_DualPCB_Configurable_Logic_201712 Dynamically create your own combination logic device Leaflet 2017-12-21
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT1081-2 plastic, leadless extremely thin small outline package; 10 terminals; 0.35 mm pitch; 1.7 mm x 1 mm x 0.5 mm body Package information 2020-04-21

支持

如果您需要設(shè)計/技術(shù)支持,請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
aup2g57 74AUP2G57 IBIS model IBIS model 2015-04-02

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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